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  vishay siliconix dg3000 document number: 71742 s-70853?rev. f, 30-apr-07 www.vishay.com 1 low-voltage single spdt micro foot ? analog switch features ? micro foot ? chip scale package (1.07 x 1.57 mm) ? low voltage operation (1.8 v to 5.5 v) ? low on-resistance - r ds(on) : 1.4 ? fast switching - t on : 24 ns, t off : 9 ns ? low power consumption ? ttl/cmos compatible benefits ? reduced power consumption ? simple logic interface ? high accuracy ? reduce board space applications ? cellular phones ? communication systems ? portable test equipment ? battery oper ated systems ? pcm cards ?pda description the dg3000 is a single-pole/double-throw monolithic cmos analog switch designed for high performance switching of analog signals. combining low power, high speed (t on : 24 ns, t off : 9 ns), low on-resistance (r ds(on) : 1.4 ) and small physical size (micro foot, 6-bump), the dg3000 is ideal for portable and battery powered applications requiring high per formance and efficient use of board space. the dg3000 is built on vishay siliconix?s low voltage ji2 process. an epitaxial layer prevents latchup. break-before - make is guaranteed for dg3000. each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. as a committed partner to the community and the environment, vishay siliconix manufactures this product with the lead (pb)-free devi ce terminations. for micro foot analog switching produc ts manufactured with tin/ silver/copper (sn/ag/cu) device terminations, the lead (pb)-free "-e1" suffix is being used as a designator. functional block diagram and pin configuration * pb containing terminations are not rohs compliant, exemptions may apply. no (source 1 ) com nc (source 2 ) b1 b2 b3 top view in v+ gnd micro foot (6-bump) a1 a2 a3 xxx 3000 device marking: 3000 xxx = date/lot traceability code a1 locator truth table logic nc no 0onoff 1offon ordering information temp range package part number - 40 to 85 c micro foot: 6-bump 3 x 2, 0.5 mm pitch 165 m nom. bump height (eutectic, snpb) dg3000db-t1 micro foot: 6-bump 3 x 2, 0.5 mm pitch, 238 m nom. bump height (lead (pb)-free, sn/ag/cu) DG3000DB-T1-E1 available pb-free rohs* compliant
www.vishay.com 2 document number: 71742 s-70853?rev. f, 30-apr-07 vishay siliconix dg3000 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. refer to ipc/jedec (j-std-020a). no hand/manual solder rework recommended. c. all bumps soldered to pc board. d. derate 3.1 mw/c above 70 c. absolute maximum ratings t a = 25 c, unless otherwise noted parameter limit unit referenced v+ to gnd - 0.3 to + 6 v v in, com, nc, no a - 0.3 v to (v+ + 0.3 v) continuous current (any terminal) 50 ma peak current (pulsed at 1 ms, 10 % duty cycle) 200 storage temperature (d suffix) - 65 to 150 c package reflow conditions b vpr (eutectic) 215 c ir/convection (eutectic) 220 ir/convection (lead (pb)-free) 250 power dissipation (packages) c 6-bump, 3 x 2 micro foot d 250 mw specifications (v+ = 2.0 v) parameter symbol test conditions otherwise unless specified v+ = 2.0 v, 10 %, v in = 0.4 or 1.6 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 1.8 v, v com = 1.0 v, i no , i nc = 10 ma room full d 17 20 22.5 r on flatness d r on flatness v+ = 1.8 v, v com = 0 to v+, i no , i nc = 10 ma room 14 switch off leakage current f i no(off) i nc(off) v+ = 2.2 v v no , v nc = 0.5 v/1.5 v, v com = 1.5 v/0.5 v room full d - 700 - 11 700 11 pa na i com(off) room full d - 700 - 11 700 11 pa na channel-on leakage current f i com(on) v+ = 2.2 v, v no , v nc = v com = 0.5 v/1.5 v room full d - 700 - 11 700 11 pa na digital control input high voltage v inh full 1.6 v input low voltage v inl full 0.4 input capacitance d c in full 5 pf input current d i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 1.5 v, r l = 300 , c l = 35 pf figures 1 and 2 room full d 61 76 79 ns turn-off time t off room full d 17 33 36 break-before-make time t d room 1 45 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 2 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 61 db crosstalk d x ta l k room - 67 no, nc off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 31 pf channel-on capacitance d c on room 98 power supply power supply range v+ 1.8 2.2 v power supply current d i+ v in = 0 or v+ 0.1 1.0 a power consumption p c 2.2 w
document number: 71742 s-70853?rev. f, 30-apr-07 www.vishay.com 3 vishay siliconix dg3000 specifications (v+ = 3.0 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.4 or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance d r on v+ = 2.7 v, v com = 1.5 v, i no , i nc = 10 ma room full 3.3 3.4 4.1 4.2 r on flatness d r on flatness v+ = 2.7 v, v com = 0 to v+, i no , i nc = 10 ma room 1.3 switch off leakage current f i no(off) i nc(off) v+ = 3.3 v v no , v nc = 1 v/3 v, v com = 3 v/1 v room full - 800 - 13 800 13 pa na i com(off) room full - 800 - 13 800 13 pa na channel-on leakage current f i com(on) v+ = 3.3 v, v no , v nc = v com = 1 v/3 v room full - 800 - 13 800 13 pa na digital control input high voltage v inh full 2 v input low voltage v inl full 0.4 input capacitance d c in full 5 pf input current d i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 2.0 v, r l = 300 , c l = 35 pf figures 1 and 2 room full 34 49 52 ns turn-off time d t off room full 12 30 33 break-before-make time d t d room 1 23 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 4 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 61 db crosstalk d x ta l k room - 67 no, nc off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 31 pf channel-on capacitance d c on room 47 power supply power supply range v+ 2.7 3.3 v power supply current d i+ v in = 0 or v+ 0.1 1.0 a power consumption p c 3.3 w
www.vishay.com 4 document number: 71742 s-70853?rev. f, 30-apr-07 vishay siliconix dg3000 notes: a. room = 25 c, full = as determined by the operating suffix. b. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. guarantee by design, nor s ubjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications (v+ = 5.0 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 %, v in = 0.8 or 2.4 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on- resistance r on v+ = 4.5 v, v com = 3 v, i no , i nc = 10 ma room full 1.4 1.6 2.3 2.8 r on flatness d r on flatness v+ = 4.5 v, v com = 0 to v+, i no , i nc = 10 ma room 0.5 switch off leakage current i no(off) i nc(off) v+ = 5.5 v v no , v nc = 1 v/4.5 v, v com = 4.5 v/1 v room full - 1.2 - 21 1.2 21 na i com(off) room full - 1.2 - 21 1.2 21 channel-on leakage current i com(on) v+ = 5.5 v, v+ = 5.5 v v no , v nc = v com = 1 v/4.5 v room full - 1.2 - 21 1.2 21 digital control input high voltage v inh full 2.4 v input low voltage v inl full 0.8 input capacitance c in full 5 pf input current i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 3 v, r l = 300 , c l = 35 pf figures 1 and 2 room full 24 36 39 ns turn-off time d t off room full 922 25 break-before-make time d t d room 1 15 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 38 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 61 db crosstalk d x ta l k room - 67 source-off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 30 pf channel-on capacitance d c on room 96 power supply power supply range v+ 4.5 5.5 v power supply current i+ v in = 0 or v+ 0.1 1.0 a power consumption p c 5.5 w
document number: 71742 s-70853?rev. f, 30-apr-07 www.vishay.com 5 vishay siliconix dg3000 typical characteristics 25 c, unless otherwise noted r on vs. v com and supply voltage - on-resistance ( ) r on 0 4 8 12 16 20 012345 v com - analog voltage (v) v+ = 1.8 v v+ = 2 v v+ = 3 v v+ = 5 v r on vs. analog voltage and temperature supply current vs. temperature 0 2 4 6 8 10 12 14 012345 - on-resistance ( ) r on v com - analog voltage (v) v+ = 2 v v+ = 5 v 85 c - 40 c 25 c 85 c - 40 c 25 c - 60 - 40 - 20 0 20 40 60 80 100 10 1 0.01 temperature ( c) i+ - supply current (na) 0.1 v+ = 5 v v in = 0 v r on vs. analog voltage and temperature supply current vs. input switching frequency 0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 - on-resistance ( ) r on v com - analog voltage (v) v+ = 3 v 85 c - 40 c 25 c 10 m input switching frequency (hz) 10 k 1 m 10 m 100 k 1 k 100 10 i+ - supply current (a) 10 n 1 m 100 10 1 100 n
www.vishay.com 6 document number: 71742 s-70853?rev. f, 30-apr-07 vishay siliconix dg3000 typical characteristics 25 c, unless otherwise noted leakage current vs. temperature switching time vs. temperature and supply voltage switching threshold vs. supply voltage - 60 - 40 - 20 0 20 40 60 80 100 1000 1 100 leakage current (pa) temperature ( c) 10000 v+ = 5.5 v 10 i no(off) /i nc(off) i com(on) i com(off) 0 10 20 30 40 50 60 70 - 60 - 40 - 20 0 20 40 60 80 100 t on v+ = 2 v temperature ( c) t on ,t off - switching time (ns) t on v+ = 3 v t on v+ = 5 v t off v+ = 2 v t off v+ = 3 v t off v+ = 5 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0123456 v+ - su pp l y volta g e ( v ) v t - switching threshold (v) leakage vs. analog voltage insertion loss, off-isolation, crosstalk vs. frequency charge injection vs. analog voltage - 1200 - 1000 - 800 - 600 - 400 - 200 0 200 012345 v com , v no , v nc - analog voltage leakage current (pa) v+ = 5 v t = 25 c i no(off) /i nc(off) i com(on) i com(off) - 90 - 20 10 loss, oirr, x fre q uenc y ( hz ) - 10 0 10 m 1 g 100 m 1 m 100 k - 30 - 40 - 50 - 60 - 70 - 80 talk (db) v+ = 3 v r l = 50 loss oirr x talk - 80 - 60 - 40 - 20 0 20 40 012345 v com - analog voltage (v) q - charge injection (pc) v+ = 2 v v+ = 3 v v+ = 5 v
document number: 71742 s-70853?rev. f, 30-apr-07 www.vishay.com 7 vishay siliconix dg3000 test circuits figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. switch output 0.9 x v ou t t r < 5 ns t f < 5 ns v inh v inl v out =v com r l r l +r on figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d in com v+ gnd v+ c l 35 pf v o r l 300 v inh v inl figure 3. charge injection off on on in v out v out q = v out x c l c l = 1 nf com r gen v out nc or no v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined b y sense of switch. +
www.vishay.com 8 document number: 71742 s-70853?rev. f, 30-apr-07 vishay siliconix dg3000 test circuits figure 4. off-isolation in gnd nc or no 0 v, 2.4 v 10 nf com off isolation 20 log v com v no/ nc r l analyzer v+ v+ = figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
document number: 71742 s-70853?rev. f, 30-apr-07 www.vishay.com 9 vishay siliconix dg3000 package outline micro foot: 6-bump (3 x 2, 0.5 mm pitch) notes (unless other wise specified): a. bump is eutectic 63/57 sn/pb or lead (pb)-free sn/ag/cu. b. non-solder mask defined copper landing pad. c. laser mark on silicon die back; no coating. shown is not actual marking; sample only. notes: a. use millimeters as the primary measurement. notes: a. use millimeters as the primary measurement. vishay siliconix maintains worldwide manufac turing capability. products ma y be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a composite of all qua lified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?71742 . index-bump a1 note c top side (die back) xxx 3000 recommended land pattern 0.5 0.5 6 x ? 0.150 0.229 note b solder mask ? pad dia. + 0.1 silicon bump note a b diameter 321 a b e d e a a 2 a 1 s s e eutectic (sn/pb) dim millimeters a inches min max min max a 0.615 0.715 0.0242 0.0281 a 1 0.140 0.190 0.0055 0.0075 a 2 0.470 0.495 0.0185 0.0195 b 0.180 0.250 0.0071 0.0098 d 1.555 1.585 0.0612 0.0624 e 1.055 1.085 0.0415 0.0427 e 0.5 basic 0.0197 basic s 0.278 0.293 0.0109 0.0115 lead (pb)-free (sn/ag/cu) dim millimeters a inches min max min max a 0.688 0.753 0.0271 0.0296 a 1 0.218 0.258 0.0086 0.0102 a 2 0.470 0.495 0.0185 0.0195 b 0.306 0.346 0.0120 0.0136 d 1.555 1.585 0.0612 0.0624 e 1.055 1.085 0.0415 0.0427 e 0.5 basic 0.0197 basic s 0.278 0.293 0.0109 0.0115
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.


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